1. Field of the Invention
Embodiments of the present invention generally relate to an apparatus and method used to manufacture a semiconductor device. More particularly, the invention is directed to an apparatus and method that is used to thermally process a substrate.
2. Description of the Related Art
The integrated circuit (IC) market is continually demanding greater memory capacity, faster switching speeds, and smaller feature sizes. One of the major steps the industry has taken to address these demands is to change from batch processing silicon wafers in large furnaces to single wafer processing in a small chamber.
During such single wafer processing the wafer is typically heated to high temperatures so that various chemical and physical reactions can take place in multiple IC devices defined in the wafer. Of particular interest, favorable electrical performance of the IC devices requires implanted regions to be annealed. Annealing recreates a more crystalline structure from regions of the wafer that were previously made amorphous, and activates dopants by incorporating their atoms into the crystalline lattice of the substrate, or wafer. Thermal processes, such as annealing, require providing a relatively large amount of thermal energy to the wafer in a short amount of time, and thereafter rapidly cooling the wafer to terminate the thermal process. Examples of thermal processes currently in use include Rapid Thermal Processing (RTP) and impulse (spike) annealing. A drawback of RTP type processes is that it heats the entire wafer even though the IC devices reside only in the top few microns of the silicon wafer. This limits how fast one can heat up and cool down the wafer. Moreover, once the entire wafer is at an elevated temperature, heat can only dissipate into the surrounding space or structures. As a result, today's state of the art RTP systems struggle to achieve a 400° C./s ramp-up rate and a 150° C./s ramp-down rate. While RTP and spike annealing processes are widely used, current technology is not ideal, and tends to ramp the wafer temperature during thermal processing too slowly and thus expose the wafer to elevated temperatures for too long a period of time. These thermal budget type problems become more severe with increasing wafer sizes, increasing switching speeds, and/or decreasing feature sizes.
To resolve some of the problems raised in conventional RTP type processes various scanning laser anneal techniques have been used to anneal the surface(s) of the substrate. In general, these techniques deliver a constant energy flux to a small region on the surface of the substrate while the substrate is translated, or scanned, relative to the energy delivered to the small region. Due to the stringent uniformity requirements and the complexity of minimizing the overlap of scanned regions across the substrate surface these types of processes are not effective for thermal processing contact level devices formed on the surface of the substrate.
Pulsed laser anneal techniques have been used to anneal finite regions on the surface of the substrate to provide a well defined annealed and/or re-melted regions on the surface of the substrate. In general, a during a pulse laser anneal processes various regions on the surface of the substrate are exposed to a desired amount of energy delivered from the laser to cause the preferential heating of desired regions of the substrate. Pulse laser anneal techniques have an advantage over conventional processes that sweep the laser energy across the surface of the substrate, since the need to tightly control the overlap between adjacently scanned regions to assure uniform annealing across the desired regions of the substrate is not an issue, since the overlap of the exposed regions of the substrate is typically limited to the unused space between die, or “kurf” lines (e.g., lines 10A in FIG. 3).
Due to the shrinking semiconductor device sizes and stringent device processing characteristics the tolerance in the variation in the amount of energy delivered during each pulse to different devices formed on the substrate surface is very low. These device requirements have made the tolerance to variations in the delivered energy across the exposed surface of the substrate to be rather small (i.e., <5% variation). One common non-uniformity phenomena is called “speckle.” Speckle is the generation of a random intensity distribution, or “hot spots” on the surface of the substrate, when light from a highly coherent source, such as a laser, is scattered by the features formed on a rough surface or inhomogeneous medium. Therefore, there is a need for a pulse laser technique that has a desirable uniformity and reduces or minimizes the effects of speckle on the laser annealed regions of the substrate.
To better control the pulsed laser anneal process and minimize the lateral inter-diffusion between devices the energy delivered in each pulse needs to be relatively high and the pulse duration needs to be short, but not short enough to damage the material exposed to the pulse of energy. Rapid heating of the exposed material can cause regions of high stress in the substrate, cracks to form in the substrate, or even ejection of material from the substrate surface due to the rapid expansion of the melted regions of the substrate. Therefore, there is need for a pulse laser anneal system that is able to reliably deliver energy to the surface of the substrate with minimal damage to the structure of the substrate material.
Also, the required high energy delivered during each laser pulse can permanently damage or greatly reduce the useable lifetime of the optical components (e.g., lenses) used to deliver and control the amount of energy to the surface of the substrate. Therefore, there is need for apparatus and method that can be used to deliver a high energy laser pulse that will not damage or greatly affect the useable lifetime of the optical components used to deliver the energy to the substrate surface.